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Active STUDENTSHIP UKRI Gateway to Research

Scalable two-dimensional silicon quantum processor


Funder Engineering and Physical Sciences Research Council
Recipient Organization University College London
Country United Kingdom
Start Date Sep 30, 2022
End Date Sep 29, 2026
Duration 1,460 days
Number of Grantees 2
Roles Student; Supervisor
Data Source UKRI Gateway to Research
Grant ID 2722031
Grant Description

Quantum computing has the potential to solve a wide range of problems with applications in drug discovery, materials simulations and machine learning. Large quantum computers could perform some calculations much faster than conventional computers and have the potential to significantly outperform normal computers in a select range of problems. There are many platforms that can be used to build a quantum computer, and there is currently no outright solution.

A natural candidate is the use of electron spins, known as spin qubits. Silicon spin qubits are promising due to their high qubit density and compatibility with standard industrial processes.

However, spin qubit systems are relatively immature in comparison to other hardware platforms and require scaling. This PhD project will investigate a scalable two-dimensional design for spin qubits in silicon using industrially fabricated devices ensuring that the

devices are compatible with mass scale production techniques. This will require careful consideration of individual control and readout of qubits as the devices scale in two dimensions. This presents a challenge due to the sensitivity of qubits where interactions with the local environment can cause a loss of information and therefore the impact of multiple qubits interacting with each other may present a significant challenge.

This PhD will leverage the expertise and knowledge in Quantum Motion on the sensing and control of linear arrays of silicon spin qubits with the aim of demonstrating a scalable design for a 2xN spin qubit array using industrially fabricated devices.

The focus of this PhD project is on the development of scalable dense two-dimensional architectures in silicon quantum dot devices fabricated in an industrial foundry. The central aim is to develop techniques and protocols to initialise and operate complex quantum dot devices culminating in the realisation of a 2xN quantum processor.

Initially, the project will focus on demonstrating single-qubit gates, implemented with electron spin resonance (ESR) via on-chip microwave transmission lines. The demonstration of single-qubit operations with ESR will allow the device initialisation and readout methods to be validated. Subsequently, two qubit gates can be implemented in quantum dot devices through the exchange interaction between neighbouring electrons.

Two-qubit operations can be performed in different ways, either by pulsing the gates controlling the barrier and plungers of the electrons, performing the SWAP operation or through the application of resonant microwave pulses to an ESR line in an exchange-coupled two-qubit system, implementing controlled rotation (CROT) gates. This is the conditional rotation of one qubit based upon the state of the other.

In order to demonstrate high fidelity qubit operations, accurate readout methods are also required. The measurement of spin qubits can be performed using charge sensing such as with single-electrontransistors (SET) combined with spin-to-charge conversion techniques such as Elzerman readout and Pauli-Spin-Blockade. The large footprint of SET's is not scalable and therefore charge sensing using single-electron-boxes (SEB's) and gate-based dispersive sensing can be used to reduce the on-chip readout footprint required.

By demonstrating single- and two-qubit operations in combination with scalable readout techniques and initialisation protocols, the essential components for a scalable quantum processor will be realised in this project.

All Grantees

University College London

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