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Active STANDARD GRANT National Science Foundation (US)

EPSCoR Research Fellows: NSF: Heterogeneous Integration of Wide Bandgap Semiconductor Chips for High Temperature Applications

$3M USD

Funder National Science Foundation (US)
Recipient Organization Regents of the University of Idaho
Country United States
Start Date Jan 01, 2025
End Date Dec 31, 2026
Duration 729 days
Number of Grantees 1
Roles Principal Investigator
Data Source National Science Foundation (US)
Grant ID 2429402
Grant Description

Commercial semiconductor chips and their packages are designed to work at temperatures up to 250℃. They will fail to work after a few hours at temperatures above this threshold. In recent years, research has been conducted to develop special chips made of different semiconductor materials that can operate in harsh environments for long durations, up to a year.

This project aims to address the challenges of integrating and packaging chips made from different semiconductor materials that can operate flawlessly at high temperatures for months. The goal is to create a package where the chips can continue to work for extended periods at temperatures up to 600℃. This microelectronic system in a package will find broad applications in electric suspension and brakes of electric vehicles, turbine engine sensing and control systems, deep-well drilling telemetry, and Venus and Mercury exploration, where temperatures far exceed 250℃.

The technology and management skills gained during this NSF Research Fellowship at Georgia Tech, the host site, will help the principal investigator lead the effort to revitalize semiconductor education and research at the University of Idaho, meeting the workforce needs of the semiconductor manufacturing reshoring to the U.S. in the coming decades.

In the realm of electronics, the pursuit of devices capable of enduring extreme temperatures has led to significant interest in wide bandgap (WBG) semiconductors. These materials, known for their ability to operate in harsh environments, are pivotal in advancing compact electronic systems for specialized applications. However, a key challenge lies in the efficient integration of chips fabricated from various WBG materials onto one substrate.

This integration is crucial for the development of robust electronic systems that can withstand high-temperature conditions. Addressing these challenges requires specialized knowledge and training in advanced semiconductor manufacturing techniques. The proposed project aims to enable the Principal Investigator (PI) to receive specialized training and access to state-of-the-art semiconductor fabrication and packaging facilities at Georgia Tech.

The project focuses on investigating the integration and packaging of chips and sensors based on different WBG semiconductor materials such as silicon carbide (SiC), gallium nitride (GaN), and diamond for extremely high-temperature (up to 600°C) applications. The PI has been working on the high-temperature 3D packaging of SiC chips for three years.

Dr. C. P.

Wong, the primary research collaborator at Georgia Tech, specializes in packaging material synthesis and characterizations, especially flip-chip underfill, an essential part of the proposed research. After the completion of the project, the PI will continue collaborating with the faculty at Georgia Tech, obtain research funds in this advanced packaging area, and expand the University of Idaho’s research and education capability for semiconductor workforce training.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

All Grantees

Regents of the University of Idaho

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