SHF: Small: Semi-supervised Learning for Design and Quality Assurance of Integrated Circuits

Integrated circuits (ICs) have found their way to a plethora of applications such as computing, communication and data processing, instrumentation, control, and transportation. The continuing technology scaling over the past decades has provided plentiful miniaturized devices with unprecedented performance and efficiency at the disposal of the designer.

However, implementing ICs using modern technologies is not an easy task. The ever-increasing performance and robustness requirements and technology sophistications have rendered design, verification, and manufacturing complex and costly. This has tremendous impact on two fronts: design productivity and quality assurance, which are the targets of this project.

First, there is a pressing need to close the widening design productivity gap due to the increasing circuit and system complexities, and shortage of experienced human designers, specifically for knowledge-intensive custom circuit design. Second, it is desirable to provide quality assurance in lieu of a combination of growing process instabilities and variations and demanding robustness requirements for mission critical applications such as automotive electronics, avionics, and biomedicine.

This project will develop innovative machine learning technology to close the productivity gap and address the challenge in quality design in today’s ever-complex IC design and manufacturing setting. The algorithms, circuit models, and design tools resulted from this work will be disseminated in broad communities through publications, workshops, talks, and research collaborations.

The lead investigator will actively recruit undergraduate students, including students from underrepresented groups, for research participation and training while partnering with various outreach programs. The project will produce excellent materials to be integrated into undergraduate and graduate level curriculum on integrated circuits and computer aided design powered by modern machine learning technology, thereby providing excellent workforce training opportunities in these areas of importance.

Engagement with the US high-tech industry and other research organizations will be sought to broaden the impact of this work, and promote potential technology transfer to the practice.

The technical approach of this work centers on semi-supervised learning, which allows for simultaneous use of labeled and unlabeled data for the targeted machine learning applications. While showing promise, semi-surprised learning has yet to be systemically explored in the integrated circuits community. To this end, this work will develop a semi-supervised learning framework to address the key challenge brought by lack of expensive labeled data and domain-specific needs of IC design and quality assurance, broadly applicable to data-efficient circuit optimization, failure and anomaly detection, test, and manufacturing data analysis.

The focused domain-specific semi-supervised learning is promising in offering a potentially game-changing solution to the intended circuit applications by leveraging large amounts of cheap unlabeled data and reducing the utilization of expensive labeled data to its minimum. Specifically, this work will provide solutions to data-efficient design optimization and quality assurance under two settings: static and adaptive semi-supervised learning.

In the former setting, learning is performed over a provided labeled dataset without additional labeled data query. The latter setting opens up the added dimension of adaptive semi-supervised learning with improved quality of learning and further reduced labeled data use.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.