FuSe: Co-designing Continual-Learning Edge Architectures with Hetero-Integrated Silicon-CMOS and Electrochemical Random-Access Memory

The transformative changes brought by machine learning and artificial intelligence are accompanied by immense financial and environmental costs. This has inspired more specialized computer hardware and computing paradigms, such as in-memory-computing where the data processing and data storage are carried out by the same device, to perform such data-intensive calculations more efficiently, especially for mobile devices and robots where the space and energy supply are typically limited.

However, despite recent advances in the field, it is still a daunting challenge to realize autonomous mobile devices capable of continuously learning their environment and adjusting their behaviors accordingly without connection to centralized servers. This project will address this limitation by co-designing the core memory and information-processing devices, the computer architecture, and the learning algorithms by an interdisciplinary combination of research by material scientists, device engineers, circuit designers, and computer scientists.

Successful completion of the project will be a significant step toward a transformative computing system enabling robots and other mobile devices to perform learning by themselves with unprecedented energy and chip-area efficiencies. This project will also integrate research with education to grow the semiconductor research and development talent pool, through close collaborations among the research university, minority-serving institution, and two-year community college.

In this project, a holistic co-design approach will be adopted to realize a hybrid platform, composed of silicon circuits heterogeneously integrated with advanced analog electrochemical random-access memory (ECRAM) hardware. It functions as a robust, compact, energy-efficient, and cost-effective in-memory-computing architecture that renders the edge-learning capability to robots navigating in complicated and evolving environments.

To accomplish this target, the team will develop high-speed ECRAM devices and arrays incorporating novel nano-structured solid-state protonic electrolytes. Physics-based and experimentally verified device models will be established to correlate the material properties with ECRAM performances as part of the process design kit. ECRAMs will then be integrated with silicon peripheral circuits to form crossbar micro-architectures, which can mitigate impacts from ECRAM device non-idealities through the adoption of numerical format and precision scaling techniques.

Meanwhile, custom simultaneous localization and mapping algorithms will be co-designed with the unique hardware attributes in consideration. Finally, the team will build a hybrid system composed of the ECRAM edge-learning accelerator and auxiliary silicon chips integrated on a circuit board for robot self-navigation. The goal is to achieve >20x higher energy and area efficiency compared to solutions based on conventional silicon technologies and von Neumann architecture.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.