FuSe-TG: Reconfigurable Threshold Logic via Flexible Thin Film Electronics: A Pathway to Semiconductor Workforce Development

Modern electronics can form novel wearable devices and systems, thanks to advances in printed and flexible electronics in the last two decades. These flexible systems can facilitate many advances in critical areas such as preventive medicine, environmental monitoring, low-cost supply-chain management, or smart packaging. We have also been able to utilize compact logic controller chips, so-called edge-computing elements, that can be thinned down and included in such devices and systems to take advantage of signal processing and wireless connectivity.

The next generation of these smart wearable systems must now develop an ability to incorporate specialized low-power and reconfigurable logic elements that can harness the full power of machine-learning and artificial intelligence. Known as neuromorphic computing elements and neural accelerators, these added computational elements can lessen the load edge-computing will face when billions of these wearable elements could overload the networks and cloud computing, each demanding to run neural inferences otherwise remotely.

Here, we propose to explore and develop threshold logic gates (TLGs) that can be utilized to build such neural circuitry for flexible electronics. Using our expertise in metal-oxide (MOx) thin-film transistors (TFTs) and logic circuit design, we will explore novel TLGs that will implement reconfigurable, secure and ultra-compact neuromorphic computing elements that can address the impending bottleneck in truly revolutionary wearable electronics of the next decade.

The added benefit of working with flexible electronics is its unique potential to serve as an accessible and ‘flexible’ technology platform to learn, explore and test integrated devices and systems. Since such integral experiences are no longer affordable or practical at the undergraduate level within state-of-the-art semiconductor engineering, flexible electronics can become a true enabler for introducing students to heterogenous integration.

Hence, we also plan to expose students in a community college, in prime position to train technicians and engineers for the upcoming Intel chip fab to be opened in central Ohio, to flexible electronics via an accessible and hands-on course to be developed. Thus, we propose a novel and timely program that addresses both practical and immediate needs of semiconductor electronics that will expand with the impact of flexible and wearable devices.

The proposal is intended to identify and demonstrate that edge-computing implemented via MOx TFTs on resource-constrained flexible systems is an ideal ‘breeding ground’ for the development of reconfigurable neural accelerators. It is also a natural platform to excite and captivate students of engineering and technician degrees to become interested in the semiconductor industry.

To this end, we first explore the most appropriate TLGs circuit topologies as well as optimal device parameters to implement capable logic building blocks by an iterative computer modeling, TFT process refinement, SPICE parameterization and logic circuit simulation cycle. This methodology will allow us to progressively obtain more stable and finely tuned TLGs.

Products of this iterative loop (i.e. capable, stable and novel TFT devices) will be put to use in the final phase of the project to implement a six-input reconfigurable TLG example that can be applied to adaptive and secure logic system design, along with a compact full-adder circuit crucial for the design of efficient arithmetic units. The third basic circuit to be implemented is a simple 3XOR artificial neural network that can illustrate TLGs neuromorphic capabilities.

Finally, the insights gained from this work and general promise of flexible electronics will be used to usher students to careers in the semiconductor industry that will be expanding in the next decade.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.