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| Funder | National Science Foundation (US) |
|---|---|
| Recipient Organization | Georgia Tech Research Corporation |
| Country | United States |
| Start Date | Oct 01, 2021 |
| End Date | Sep 30, 2025 |
| Duration | 1,460 days |
| Number of Grantees | 1 |
| Roles | Principal Investigator |
| Data Source | National Science Foundation (US) |
| Grant ID | 2128419 |
Technology scaling, device integration and high circuit speeds have increased the risk of errors in digital processors running computing and control applications. Such errors can jeopardize the operational safety of autonomous systems employing embedded processors in the field, causing severe loss of performance, accidents, or damage to life and property.
To put this in perspective, applications such as self-driving cars and drones demand tera-ops of computation throughput and yet must perform with exacting levels of reliability and safety. The latter reliability and safety demands must be met with minimal degrees of hardware and software redundancy without negatively impacting dependability, power consumption, payload, form factor and cost considerations that are critical for commercial success.
To alleviate relevant safety threats, this project aims to deploy low-cost and efficient methods for detecting and mitigating the effects of monitored errors in real time and in the field as effectively and rapidly as possible. This will enable a paradigm shift in the way failure-tolerance technologies are applied to autonomous systems while maintaining their reliability, affordability and cost.
The project integrates research with education involving development of educational infrastructure for teaching and laboratory work, incorporation of diversity in student participation, exchanges with industry, technology transfer and engagement with undergraduate and high-school students, all with the goal of producing highly qualified trained engineers for the workplace of the future.
Today, implementing failure tolerance for nonlinear signal-processing and control algorithms is dependent on some form of computation duplication. The algorithm-based fault-tolerance techniques of the past were designed mostly for linear computations and are not directly applicable to error control in nonlinear computations of modern autonomous systems.
To resolve this, the project is built around the concept of algorithmic checks that encode nonlinear computations with linearized or nonlinear checking mechanisms. The checks are created using analytical methods for weakly nonlinear systems or by machine-learning algorithms for generic nonlinear systems and enable real-time error detection in switched capacitor circuits, nonlinear digital filters, adaptive state-estimation filters, nonlinear control algorithms and deep neural networks.
Error correction is performed via state restoration in which the system state after error detection is restored to a prior fault-free system state or by using probabilistic error-compensation techniques. The core techniques can be applied to different aspects of the core computations performed in embedded computing infrastructure for autonomous systems, namely perception, intelligence, decision-making and control to make them error-resilient and trustworthy.
The underlying science is enabling the design of entirely new classes of self-checking reliable autonomous systems that are beyond the scope of the current state of the art.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
Georgia Tech Research Corporation
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