Highly Efficient CMOS Transmitter for Emerging Broadband Wireless Communication Systems

Recent developments in mobile computing and wireless internet have led to an increasing demand for portable computers and smart phones equipped with wireless local area networks operating with multi-standard capabilities. More standards and applications will be incorporated in the near future local area wireless networks due to the advances of the semiconductors technology that allows more devices on a single complementary metal-oxide-semiconductor (CMOS) chip.

The wireless connectivity has expanded far beyond smartphones and person-to-person communications to now encompass unexpected device-to-device communication systems. The trend towards faster and more efficient communication systems demand an optimal use of the available spectrum by employing more advanced coding schemes that increases the number of transmitted bits per symbol, and that results in more effective transmission of information per available bandwidth.

But, these systems demand stringent transmitter/receiver (TX/RX) specifications. The advanced coding schemes assign more bits per transmit symbol, then the voltage difference between symbols reduces making the communication scheme more sensitive to the background noise, then it demands superior signal power to noise power ratio. The signal power is usually bounded to allow other users to share the available spectrum; for handheld devices it is a must to optimize the use of power to extend battery’s recharging time.

The major challenge is the lack of transistor’s linearity to satisfy the requirements of advanced standards. The device non-linearities generate non-linear replicas of the transmitted and received signals with multiple intermodulation products falling in the signal band which degrade the quality of the original signal. This research program will develop innovative digital CMOS based global calibration schemes for the transmitter that addresses these issues.

The predicted market for connected smart devices will be over 75 billion devices by 2025. However, the emerging multimedia applications demand more bandwidth and better system performance due to the use of spectral efficient modulation schemes with large peak-to-average ratios. The ultra-broadband transceivers are less tolerant to transmit errors and demand stringent transceiver linearity, flat gain in the entire signal bandwidth and linear phase response.

In addition, the power amplifier (PA) is responsible for most of the power consumption in hand-held devices; improving the power efficiency and performance of the transmitter is critical for the advance of mobile communication systems. The transmitter optimization is a complex task that cannot be achieved by using conventional calibration methodologies.

Most of the transmitter errors are non-linear and signal dependent, then the evaluation of these errors is a difficult task. The typical compensation methodologies are complex and expensive in terms of power consumption and digital resources, and it is very difficult to use them in broadband applications.

Affective cost is another important constraint. Currently, over 85% of the existing transmitters are fabricated in non-CMOS technologies, while the control and signal processing is implemented in CMOS technologies. Full CMOS transceivers offer a system solution on chip will have significant impact on the efficiency, reliability, and production cost of the transceivers.

The proposed CMOS TX architecture leverages on an agile envelope tracking system based on an innovative current on demand current-steering digital-to-analog converter that enhances the tracking capabilities and power efficiency of the power management system. Also, the proposed broadband low-power digital linearization technique accounts for PA non-linearities, bandwidth and phase TX limitations, as well as memory effects.

The proposed TX architecture will achieve an error vector magnitude under -40dB and power added efficiency over 30% when handling 400MHz signal bandwidth.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.