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Completed STANDARD GRANT National Science Foundation (US)

SaTC: CORE: Small: Efficient Logic Encryptions for Hardware IP Protection

$5M USD

Funder National Science Foundation (US)
Recipient Organization Northwestern University
Country United States
Start Date Jul 01, 2021
End Date Jun 30, 2025
Duration 1,460 days
Number of Grantees 1
Roles Principal Investigator
Data Source National Science Foundation (US)
Grant ID 2113704
Grant Description

With the increasing outsourcing of integrated circuit fabrication, hardware Intellectual Property protection has become a critical issue for the semiconductor industry. This project develops efficient logic encryption techniques and tools to protect circuits from piracy. Logic encryption is a technique that modifies a circuit with added extra inputs such that only users with the correct key can get the correct results.

The fact that an attacker has the access to a working chip and the structure of the circuit makes the problem very challenging. The project will develop efficient algorithms and programs for logic encryption that are provably secure using mathematical and cryptographic foundations.

To protect a circuit, logic encryption needs to insert errors when the key is incorrect, and also needs to prevent the attacker from gathering information from the circuit structure. The former is called locking, and the latter is called obfuscation. The project separates these two tasks and develops solutions for both of them.

It also investigates the contention between the number of errors and hardness of key discovery. Trade-offs among the locking, obfuscation, and key lengths are thoroughly investigated. For obfuscation, universal circuit based solutions will be developed, and efficient designs with small key lengths need to be discovered.

In order to apply the techniques in the integrated circuit design flow, design automation algorithms and tools need to be developed and tested.

Intellectual property protection has become a key enabler for the survival of the semiconductor industry. The techniques and tools developed in the project can help the industry to reduce and even prevent hardware piracy. Industrial test cases will be used in the evaluation of the project. The project will also provide training and educational opportunities for next-generation hardware designers, to help them understand and improve the security of their designs.

The logic encryption algorithms, programs, and testing data, and their analyses will be collected as the data set for the project. This data set, with explanation notes and README, and the publications generated from the project will be maintained in a permanent repositories at Northwestern website and on the GitHub. The URL is: https://github.com/haizhouus/Logic-Encryption

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

All Grantees

Northwestern University

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