Collaborative Research: SHF: Medium: Revitalizing EDA from a Machine Learning Perspective

Despite its spectacular success in the past, design automation of electronic circuits and systems remains limited in effectiveness and efficiency. This is often due to unnecessarily excessive iterations of point software tools, where early predictions on downstream design steps are overly pessimistic and interoperations among different tools largely require manual handling.

As such, existing chip-design flows are not considered fully automated, and there still exists a strong need for jointly exploring the considerable room between the different steps in these flows. Moreover, existing design-verification approaches usually involve unwanted redundancy and substantial manual effort, contributing greatly to a well-known bottleneck of time-to-market.

The recent progress in machine-learning technology offers a great opportunity to revitalize current Electronic Design Automation (EDA) flows from an alternative perspective, i.e., extracting design and verification knowledge from existing design data, and reusing it on new designs. The goal of this research is to develop such knowledge extraction and reuse techniques with the aid of the state-of-the-art machine learning technology.

The outcome of this research is to help mitigate the chip-design productivity crisis and cater to the increasing demand for hardware-accelerated computing. This research is also training students, including women and under-represented minorities, with interdisciplinary skills and preparing tomorrow’s high-tech workforce in the U.S. for solving challenges in the electronic industry.

The project involves systematic research on machine learning in the context of electronic design automation with five integrated components: 1) development of learning-based fast and high fidelity prediction techniques for knowledge extraction in the structural and behavioral domains of circuit designs; 2) a study on how to seamlessly integrate the design predictions with circuit optimizations; 3) applying machine-learning prediction to accelerating functional-verification coverage and facilitating automated debugging; 4) developing autonomous learning on the interplay amongst tools and thereby achieving automated synthesis space exploration; 5) automated machine-learning architecture search and feature refinement in EDA applications.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.