Collaborative Research: Secure and Efficient Post-quantum Cryptography: from Coding Theory to Hardware Architecture

Public-key ciphers are used for digital signature and secure information exchange in numerous communication and storage systems to ensure data confidentiality, authenticity, and non-repudiability. The current standards for public-key ciphers are based on large number factorization or discrete logarithm, which can be solved in polynomial time by a quantum computing algorithm.

Substantial advancements have been made on quantum processors recently and there is imminent need of new cryptography schemes that are secure against quantum computing attacks. The team will make advances in error-correction code (ECC)-based McEliece/Niederreiter cryptography. The approach will be based on low or medium-density parity-check (LDPC or MDPC) ECCs that are among the most promising schemes resistant to quantum computing attacks.

The advances will be achieved by coupling research on cryptography and error-correction coding theory, thus eliminating possible backdoors and attacks for these ciphers. The team will also develop efficient and secure hardware implementations that are indispensable in order to adopt the ECC-based ciphers broadly in practical systems. The new challenges posed by the different constructions of LDPC/MDPC codes for cryptographic purposes will be addressed and advanced decoding algorithms will be investigated to unleash the performance potential of these cryptosystems.

Additionally, low-overhead schemes will be developed to prevent the leakage of secret key from side-channel information, such as the timing and power consumption of the circuit chip implementing the cipher. This project will also contribute to the development of workforce skilled in coding, cryptography and hardware architecture design for the growing security needs in the US.

The participating students will receive advanced training in engineering, and their educational experiences will be enriched by close collaboration between the PIs and their international collaborators.

This proposal fills the gaps among the research on cryptography, error-correction coding theory, and hardware architecture design for the ECC-based post-quantum McEliece/Niederreiter cryptosystems. Efficient and highly secure hardware implementations will be developed through integrating theoretical study, attack analysis, and hardware architecture design.

Such a cross-layer design approach enables the development of unprecedented short-latency, small-area, low-power, and secure ECC-based cryptosystems. For the first time, possible attacks from coding theoretical perspective will be studied comprehensively and low-overhead mitigation methodologies will be developed for existing and new potential attacks.

Taking into account the specifics of the codes utilized in the ECC-based cryptosystems, novel approaches and decoding scheduling schemes will be designed to substantially improve the hardware efficiency. A framework of design and implementation of the ECC-based cryptosystems satisfying various system constraints, such as latency, silicon area, and power consumption, will be developed to enable broad application of post-quantum cryptography.

Moreover, algorithmic-level side-channel attack resistant approaches, which have much lower overheads compared to circuit-level methodologies, will be developed by exploiting the variations of LDPC/MDPC decoding data flow and scheduling.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.