CAREER: Optimizing Scalability and Reconfigurability in Silicon Photonic Switch Fabrics

Our daily lives depend heavily on efficiently moving and processing data generated by different applications, from social networks and online shopping to healthcare and educational applications to emerging applications such as autonomous driving. The rapid growth of such data is putting increased pressure on datacenter networks, where enormous amounts of data must be processed.

To aid in this task, the underlying datacenter network switches, which are responsible for moving data from one server to another, should provide the fastest possible switching with high bandwidths, while minimizing the energy required. To address these requirements, this project involves transformative research to design and optimize a new class of network switches based on silicon photonics technology that will be capable of transferring large amounts of data with ultra-low latency.

The project includes research on this new technology and its system application in large-scale datacenter networks. It will incorporate opportunities for students (including underrepresented groups) at K-12, undergraduate, and graduate levels to work on real-world problems. It also includes a new outreach program to K-12 schools in Northern Colorado and Southern Wyoming with low college-attendance rates.

This project proposes a long-term, integrated program of research to optimize the scalability and reconfigurability in silicon photonic switches for future high-performance computing and datacenter systems. In particular, the researchers propose comprehensive optimizations across the entire design space of silicon photonic switches, including device, network, and control layers, to realize ultra-fast reconfigurable, large-scale, and energy-efficient silicon photonic switches.

At the device layer, a new class of interferometric silicon photonic switching devices will be designed and optimized to realize fast switching elements with ultra-low optical losses and crosstalk noise. At the network layer, topology-aware optical power loss and crosstalk noise models will be developed to be integrated into a new network-optimization platform, creating and optimizing various types of high-radix networks specifically for large-scale silicon photonic switches.

The new research at the control layer will analyze traffic flows in the switch fabric to develop an ultra-fast and energy-aware switch reconfiguration solution. Last, a new open-source silicon photonic switch cross-layer design and co-optimization tool will be developed to incorporate the new models and optimization solutions at each design layer.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.