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| Funder | National Science Foundation (US) |
|---|---|
| Recipient Organization | University of Wisconsin-Madison |
| Country | United States |
| Start Date | Mar 01, 2021 |
| End Date | Feb 28, 2027 |
| Duration | 2,190 days |
| Number of Grantees | 1 |
| Roles | Principal Investigator |
| Data Source | National Science Foundation (US) |
| Grant ID | 2045985 |
Technology trends are moving towards a future of ultra-low-power computing where everything (whether it be a ring on a finger or even an implant in the body) becomes capable of some form of smart processing. However, such a future cannot be realized with the traditional processors used in today's tablets and smartphone devices. While typical computers operate at power budgets of 10s-100s of watts, ultra-low-power devices would need to be able to operate at as low as 10s of milliwatts.
And despite orders of magnitude less power, such devices would need to have the same compute capabilities and general programmability to support complex tasks such as data analytics, machine learning and wireless communication that are essential for these applications. In other words, even if it becomes possible to make the processor hardware ultra-low-power, these devices would be unusable if software developers are not able to write efficient programs that can run on these devices.
This proposal makes the case for stochastic computing (SC), an unconventional approach for designing ultra-low-power systems. Instead of reading and writing data in binary, SC reads and writes in unary, where data is encoded as probabilities instead of standard digital numbers. This unconventional computing style allows SC to perform computations with circuits that are orders of magnitude smaller than their binary counterparts.
For example, a multiplier circuit shrinks from 100s of logic gates down to a single logic gate in SC. Though promising, building processors using SC is no simple feat for a couple of reasons. First, there is a general lack of standard toolchains publicly available for designing, simulating and comparing SC circuits.
Second, prior SC works are mostly case-by-case, proposing circuits that only work for specific applications and lack sufficient programmability for software developers to write useful programs.
The technical goal of this project is to lower the barrier-to-entry for non-expert developers to consider adopting SC in their systems. The PIs aim to develop and standardize an open-sourced framework, named UnarySim, for rapidly designing and evaluating SC systems. Leveraging the PIs' preliminary work on building efficient SC circuits, the project will culminate in the design of the first general-purpose, programmable SC processor that can support a variety of ultra-low-power applications.
If the proposed research is successful, it can help proliferate the budding SC community and make SC a practical (and competitive) option in the tech industry. The broad goal of this proposal is to realize the potential of ultra-low-power computing, making it possible to perform unprecedented computing tasks at the cost (and size) of a dime. This can open the door for important new applications such as smart pacemakers, wearables, augmented reality and precision agriculture, to name a few.
The insights gained from this research will be publicly disseminated in scientific venues and integrated into curricula to teach young students about power-saving principles and their impact on the broader community.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
University of Wisconsin-Madison
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