Loading…
Loading grant details…
| Funder | European Commission |
|---|---|
| Recipient Organization | Interuniversitair Micro-Electronica Centrum |
| Country | Belgium |
| Start Date | Sep 01, 2022 |
| End Date | Aug 31, 2026 |
| Duration | 1,460 days |
| Number of Grantees | 7 |
| Roles | Associated Partner; Participant; Coordinator |
| Data Source | European Commission |
| Grant ID | 101070560 |
PUNCH offers a solution for time-deterministic and time-sensitive networks by developing a new optical switching paradigm which (I) breaks the trade-off between flexibility (ultra-dynamic reconfigurability) and determinism (guaranteed latency and jitter) by offering an all-to-all reconfigurable interconnect; (II) reduces congestion by activating bandwidth steering so that additional capacity can be allocated between hot nodes in the network; (III) provides unparalleled dynamics and bandwidth efficiency by further enabling multiplexing in the time domain with fast reconfigurable capability.
A 2×2×8Lambda wavelength selective switching element will be scaled to a fully non-blocking 8x8x8Lambda and 16x16x8Lambda reconfigurable optical switch fabric.
The development of a micro-transfer-printing process for semiconductor optical amplifiers enables loss-less optical switching on a silicon photonics platform.
Custom configuration electronic ICs to actuate, control, and power-monitor a scaled switch fabric will be densely integrated with the photonic ICs into a heterogeneous fanout wafer-level package, processed on a 200mm reconstructed wafer platform.
In addition, the optical interfacing to the photonic ICs will be accomplished using an optical redistribution layer, providing an optical fanout on high-density organic substrates, and allowing for a scalable optical fiber packaging solution.
The novel integration and packaging processes will be applied for manufacturing 1.6 Tbit/s optical transceivers providing the interface between optical switches and electronic resources (compute, memory, and storage).
The optical switch and transceiver prototypes will be demonstrated in a 5G RAN Transport Network, for TSN Fronthaul applications and for memory disaggregation in data centers.
The Chancellor Masters and Scholars of the University of Cambridge; At & S Austria Technologie & Systemtechnik Aktiengesellschaft; Fraunhofer Gesellschaft Zur Forderung Der Angewandten Forschung Ev; Interuniversitair Micro-Electronica Centrum; Phix Bv; Ericsson Telecomunicazioni Spa; Mellanox Technologies Ltd - Mlnx
Complete our application form to express your interest and we'll guide you through the process.
Apply for This Grant