Computation Systems Based on Hybrid Spin-wave–CMOS Integrated Architectures

In the future, the miniaturisation of electronic devices– epitomised by Moore’s law – will be progressively limited by increasing power densities and the associated chip heating.

Moreover, autonomous microelectronic applications, for example for the Internet of Things, demand high performance at ultralow power.

Therefore, much research has recently focused on disruptive computing technologies that limit power consumption and optimise performance per circuit area.

Spin wave computing is a disruptive spintronic technology that uses the interference of spin waves for computation and has considerable potential for power and area reduction per computing throughput.

Despite much recent progress in the realisation of spin wave logic gates, no concept for a complete computing system exists today that is based only on spin waves.

Thus, to advance from devices to systems, spin wave devices need to be complemented by CMOS in a hybrid spin wave–CMOS system.

Using an interdisciplinary approach joining partners with expertise in materials science, physics, device manufacturing, electrical engineering, circuit design, and packaging, SPIDER targets the demonstration of a complete operational hybrid spin wave–CMOS computing system. To date, complex spin wave circuits are yet to be realised.

SPIDER targets to fill this gap by developing spin wave logic circuits based on majority gates.

To embed these circuits into a CMOS environment, SPIDER will design mixed signal CMOS chips that can drive spin wave circuits and read out computation results. The spin wave and CMOS chips will then be combined on an interposer to obtain the final hybrid system.

This work will pave the way towards viable spin wave chips and provide a first benchmark of spin wave computing at the system level.

Based on the results, SPIDER will then develop a roadmap to advance spin wave technology to compete with CMOS in technology nodes below 1 nm.